V. Narasimha Nayak, M.Suneel , Asst Prof, M. Nagesh Babu Assoc.Prof in Dept.of ECE have authored a paper and was published in International Journal of Advances in Science and Technology

Modular multiplication is the basic building block for computation performed in RSA cryptosystem. In RSA crypto system both encryption and decryption are done by using multiplication and exponentiation. The present work describes the characteristics to implement modular multiplication and exponentiation by using Montgomery algorithm. The performance results of Montgomery algorithm for two different operand sizes and technologies in terms of area and time delay are presented and discussed.

The characteristic of FPGA prototype which is has an iterative sequential architecture is designed to implement modular multiplication using the Montgomery algorithm..The entire design was simulated using the Xilinx Project Manager (version Build 13.0) and the design was elaborated using VHDL.

Keywords: GF (Galois Field), Field programmable gate array (FPGA), Montgomery Multiplication.